The present disclosure relates to a structure integrating fin-based devices and extremely thin semiconductor-on-insulator (SOI) devices, and methods of manufacturing the same.
A finFET is field effect transistor including a channel located in a semiconductor fin having a height that is greater than a width. FinFETs employ vertical surfaces of semiconductor fins to effectively increase a device area without increasing the physical layout area of the device. Fin-based devices are compatible with fully depleted mode operation if the lateral width of the fin is thin enough. For these reasons, fin-based devices can be employed in advanced semiconductor chips to provide high performance devices.
Another type of high-performance devices employs an extremely thin semiconductor-on-insulator (ETSOI) layer to form ETSOI devices therein. ETSOI devices typically refer to devices formed in a semiconductor-on-insulator (SOI) layer having a thickness less than 50 nm, and typically less than 30 nm. ETSOI devices are also fully depleted devices due to the small thickness of the ETSOI layer, and as such provide high performance.
FinFETs and ETSOI devices employ different manufacturing sequences. Thus, forming finFETs and ETSOI devices on a same semiconductor substrate have proved to be challenging. However, there exists a need to integrate fin-based devices and ETSOI devices on a same substrate to utilize unique device characteristics provided by both types of devices.
Further, there exists a general need to provide a first type of additional devices built on a thin semiconductor layer having a thickness on par with ETSOI devices and a second type of additional devices built on a thick semiconductor region.